Micro routine of Branch instruction
The microinstruction set is expanded to include some conditional branch microinstructions. These microinstructions can also specify the status flags, condition for branching and branch address.
Consider the microinstruction at location 32 in the micro-program memory, generated from the starting address generator block. This conditional branch microinstruction tests the N bit of the condition codes. If this bit is equal to 0, a branching takes place at location 0 to fetch a new machine instruction. Otherwise, the microinstructions at location 33 and 34 are executed to load a new value into the PC
The table shows implementation of a micro routine for branch on negative instruction
1) When an End Microinstruction is encountered, the µPC is loaded with the address of the first CW in the micro-routine for the instruction fetch cycle.
2) When a new instruction is loaded into the IR, µPC is loaded with the starting address of the micro-routine for that instruction.
3) When a branch instruction is encountered and the branch condition is satisfied, the µPC is loaded with the branch address.
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