Design of memory using static memory chips

• There are four chips in each column.
• Each column represents one bit position
• There are 16 such columns to build a 64k * 16 memory
• The address bus required is of 16 bits wide
• Each chip has pin called as Chip Select and it has to be 1 to enable the chip to read or write data
• The higher 2 bits of the address are decoded to obtain the 4 chip select control signals
• The remaining 14 address bits are used to access specified bit locations inside the chip of the selected row
• The R/W’ inputs are given to all chips which provide common Read/Write’ control.

Internal Organization of a 64Kx1 dynamic memory chip << Previous
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